SK Hynix to Build $106 Billion Fab Cluster: 800,000 Wafer Starts a Month

Capping off a busy week for fab-related news, South Korea authorities this week gave SK Hynix a green light to build a new, 120 trillion won ($106.35 billion) fab complex. The fab cluster will be primarily used to build DRAM for PCs, mobile devices, and servers, using process technologies that rely on extreme ultraviolet lithography (EUV). The first fab in the complex will go online in 2025.

The new cluster will house four huge semiconductor fabrication plants, which will be located on a 4.15 million square-meter site, reports The Korea Herald. The four fabs will have a planned capacity of around 800,000 wafer starts per month (WSPM), which will make the site one of the world’s biggest semiconductor production hubs. Keeping in mind that we are dealing with EUV fabs, it is not surprising that a huge 200,000-WSPM plant with EUV tools will cost SK Hynix north of $25 billion. The fab cluster will be located near Yongin, South Korea, 50 kilometers south of Seoul, according to Yonhap news agency that cites the Ministry of Trade, Industry and Energy.

The new fabs will be used to make various types of DRAM using SK Hynix’s upcoming production technologies that will use extreme ultraviolet (EUV) lithography. And with a start date still years away, we’re likely looking at a fab that will be used to manufacture DDR5, LPDDR5X, and other future types of DRAM.

SK Hynix reportedly plans to start construction of the first fab in the Yongin cluster in the fourth quarter of 2021. Given the expected size of the massive building and the amount of time needed to folly load it with production equipment, SK Hynix expects this first fab to be completed in 2025.

It is necessary to note that just several years ago SK Hynix and Samsung used to build fabs that could produce both DRAM and NAND flash memory – or at least be converted with a minimal amount of effort. This is not the case today as DRAM production now heavily relies on lithography equipment, whereas 3D NAND production uses loads of etching tools, which is why the fabs for different types of memory have to be equipped completely differently.

The fab cluster in Yongin will be SK Hynix’s second major DRAM site in South Korea after the company’s primary DRAM hub near Icheon that houses its M10, M14, and M16 fabs. The M16 fab was completed in February and will be used for DRAM production using SK Hynix’s EUV-based 1a process technology starting the second half of 2021.

Capping off a busy week for fab-related news, South Korea authorities this week gave SK Hynix a green light to build a new, 120 trillion won ($106.35 billion) fab complex. The fab cluster will be primarily used to build DRAM for PCs, mobile devices, and servers, using process technologies that rely on extreme ultraviolet lithography (EUV). The first fab in the complex will go online in 2025.

The new cluster will house four huge semiconductor fabrication plants, which will be located on a 4.15 million square-meter site, reports The Korea Herald. The four fabs will have a planned capacity of around 800,000 wafer starts per month (WSPM), which will make the site one of the world's biggest semiconductor production hubs. Keeping in mind that we are dealing with EUV fabs, it is not surprising that a huge 200,000-WSPM plant with EUV tools will cost SK Hynix north of $25 billion. The fab cluster will be located near Yongin, South Korea, 50 kilometers south of Seoul, according to Yonhap news agency that cites the Ministry of Trade, Industry and Energy.

The new fabs will be used to make various types of DRAM using SK Hynix's upcoming production technologies that will use extreme ultraviolet (EUV) lithography. And with a start date still years away, we're likely looking at a fab that will be used to manufacture DDR5, LPDDR5X, and other future types of DRAM.

SK Hynix reportedly plans to start construction of the first fab in the Yongin cluster in the fourth quarter of 2021. Given the expected size of the massive building and the amount of time needed to folly load it with production equipment, SK Hynix expects this first fab to be completed in 2025.

It is necessary to note that just several years ago SK Hynix and Samsung used to build fabs that could produce both DRAM and NAND flash memory – or at least be converted with a minimal amount of effort. This is not the case today as DRAM production now heavily relies on lithography equipment, whereas 3D NAND production uses loads of etching tools, which is why the fabs for different types of memory have to be equipped completely differently.

The fab cluster in Yongin will be SK Hynix's second major DRAM site in South Korea after the company's primary DRAM hub near Icheon that houses its M10, M14, and M16 fabs. The M16 fab was completed in February and will be used for DRAM production using SK Hynix's EUV-based 1a process technology starting the second half of 2021.

TSMC to Spend $100B on Fabs and R&D Over Next Three Years: 2nm, Arizona Fab & More

TSMC this week has announced plans to spend $100 billion on new production facilities as well as R&D over the next three years. The world’s largest contract maker of chips says that its fabs are currently working at full load, so to meet demand for its services going forward it will need (much) more capacity. Among TSMC’s facilities to go online in the next three to four years are the company’s fab in Arizona as well as its first 2nm-capable fab in Taiwan.

“TSMC is entering a period of higher growth as the multiyear megatrends of 5G and HPC are expected to fuel strong demand for our semiconductor technologies in the next several years,” a statement by TSMC with the Taiwan Stock Exchange reads. “In addition, the COVID-19 pandemic also accelerates digitalization in every aspect. In order to keep up with demand, TSMC expects to invest $100 billion over the next three years to increase capacity to support the manufacturing and R&D of advanced semiconductor technologies. TSMC is working closely with our customers to address their needs in a sustainable manner.”

$100 Billion to Be Spent on Fabs

TSMC’s capital expenditures (CapEx) budget last year was $17.2 billion, whereas its R&D budget was $3.72 billion, or approximately 8.2% of its revenue. This year the company intends to increase its CapEx to somewhere in the range of $25 to $28 billion, which would make for a 45% to 62% year-over-year increase in that spending. The company’s R&D spending will also rise as its revenue is expected to grow. In total, TSMC plans to invest around $30 billion or more on CapEx and R&D this year. Taken altogether, if the company intends to spend around $100 billion from 2021 through 2023, its expenditures in the next two years will be roughly flat with 2021, something that should please its investors.

TSMC has a number of important fab projects ahead of it.

  • First up, the company needs to build and equip its N5-capable fab in Arizona. The facility will cost around $12 billion, will have a capacity of 20,000 wafer starts per month (WSPM), and will come online in 2024. A recent rumor indicates that TSMC might actually increase capacity of the facility and/or equip it for a more advanced fabrication process, which will increase its cost, but TSMC has never confirmed this information.
  • Secondly, TSMC will need to equip its N3-capable fab in Tainan, Taiwan, which is projected to start volume production in the second half of 2022.
  • TSMC’s third capital-expensive project is the company’s N2 (2nm) qualified GigaFab in Hsinchu, Taiwan. Furthermore, TSMC is mulling to build another N2-capable fab in Baoshan, Taiwan. Meanwhile, TSMC still has to complete development of its GAAFET-based N2 node.
  • Last but not least, TSMC is set to build two more advanced packaging facilities in Taiwan. The company already has four of such facilities, but it believes that demand for chip stacking and advanced packaging will rise in the future and it will need more capacities. Chip packaging factories are not as expensive as semiconductor production facilities, but they still cost quite a lot.

Recently TSMC wrote a letter to its customers where it explained that its fabs have been fully utilized for about a year now and it still cannot meet rising demand for chips. To that end, the company would have to ‘suspend wafer price reductions for a year from the start of 2022,’ according to a Bloomberg report.

Competition Intensifying

Right now, TSMC is the world’s largest contract maker of chips with no rivals that can match its total production capacity. A some of TSMC’s rivals, including GlobalFoundries and UMC, have pulled the plug on development of their leading-edge fabrication processes, so the number of companies that can offer leading-edge nodes has decreased. Yet paradoxically, the competition is also escalating in other respects.

Samsung Semiconductor, which has foundry, DRAM, storage, SoC, and a number of other operations, has been increasing its CapEx investments in the recent years. The company spent $93.2 billion on chip production from 2017 to 2020 and is on track spend another ~$28 billion in 2021, according to IC Insights. Samsung Foundry is still several times smaller than TSMC in terms of sales and capacity, but the gap is closing.

In addition to Samsung Foundry, Intel recently introduced its integrated device manufacturer 2.0 (IDM 2.0) plan that includes offering advanced foundry services and essentially compete against TSMC (while also using its services when needed). Intel has already announced plans to invest $20 billion in two new fabs in Arizona and said it would invest more in expansion of chip production in other parts of the USA as well as in Europe and other parts of the world.

To stay ahead of existing and emerging rivals, TSMC needs to keep investing in R&D and expand its production capacities, so a $100 billion investment plan will be instrumental for these purposes.

TSMC this week has announced plans to spend $100 billion on new production facilities as well as R&D over the next three years. The world's largest contract maker of chips says that its fabs are currently working at full load, so to meet demand for its services going forward it will need (much) more capacity. Among TSMC's facilities to go online in the next three to four years are the company's fab in Arizona as well as its first 2nm-capable fab in Taiwan.

"TSMC is entering a period of higher growth as the multiyear megatrends of 5G and HPC are expected to fuel strong demand for our semiconductor technologies in the next several years," a statement by TSMC with the Taiwan Stock Exchange reads. "In addition, the COVID-19 pandemic also accelerates digitalization in every aspect. In order to keep up with demand, TSMC expects to invest $100 billion over the next three years to increase capacity to support the manufacturing and R&D of advanced semiconductor technologies. TSMC is working closely with our customers to address their needs in a sustainable manner."

$100 Billion to Be Spent on Fabs

TSMC's capital expenditures (CapEx) budget last year was $17.2 billion, whereas its R&D budget was $3.72 billion, or approximately 8.2% of its revenue. This year the company intends to increase its CapEx to somewhere in the range of $25 to $28 billion, which would make for a 45% to 62% year-over-year increase in that spending. The company's R&D spending will also rise as its revenue is expected to grow. In total, TSMC plans to invest around $30 billion or more on CapEx and R&D this year. Taken altogether, if the company intends to spend around $100 billion from 2021 through 2023, its expenditures in the next two years will be roughly flat with 2021, something that should please its investors.

TSMC has a number of important fab projects ahead of it.

  • First up, the company needs to build and equip its N5-capable fab in Arizona. The facility will cost around $12 billion, will have a capacity of 20,000 wafer starts per month (WSPM), and will come online in 2024. A recent rumor indicates that TSMC might actually increase capacity of the facility and/or equip it for a more advanced fabrication process, which will increase its cost, but TSMC has never confirmed this information.
  • Secondly, TSMC will need to equip its N3-capable fab in Tainan, Taiwan, which is projected to start volume production in the second half of 2022.
  • TSMC's third capital-expensive project is the company's N2 (2nm) qualified GigaFab in Hsinchu, Taiwan. Furthermore, TSMC is mulling to build another N2-capable fab in Baoshan, Taiwan. Meanwhile, TSMC still has to complete development of its GAAFET-based N2 node.
  • Last but not least, TSMC is set to build two more advanced packaging facilities in Taiwan. The company already has four of such facilities, but it believes that demand for chip stacking and advanced packaging will rise in the future and it will need more capacities. Chip packaging factories are not as expensive as semiconductor production facilities, but they still cost quite a lot.

Recently TSMC wrote a letter to its customers where it explained that its fabs have been fully utilized for about a year now and it still cannot meet rising demand for chips. To that end, the company would have to 'suspend wafer price reductions for a year from the start of 2022,' according to a Bloomberg report.

Competition Intensifying

Right now, TSMC is the world's largest contract maker of chips with no rivals that can match its total production capacity. A some of TSMC's rivals, including GlobalFoundries and UMC, have pulled the plug on development of their leading-edge fabrication processes, so the number of companies that can offer leading-edge nodes has decreased. Yet paradoxically, the competition is also escalating in other respects.

Samsung Semiconductor, which has foundry, DRAM, storage, SoC, and a number of other operations, has been increasing its CapEx investments in the recent years. The company spent $93.2 billion on chip production from 2017 to 2020 and is on track spend another ~$28 billion in 2021, according to IC Insights. Samsung Foundry is still several times smaller than TSMC in terms of sales and capacity, but the gap is closing.

In addition to Samsung Foundry, Intel recently introduced its integrated device manufacturer 2.0 (IDM 2.0) plan that includes offering advanced foundry services and essentially compete against TSMC (while also using its services when needed). Intel has already announced plans to invest $20 billion in two new fabs in Arizona and said it would invest more in expansion of chip production in other parts of the USA as well as in Europe and other parts of the world.

To stay ahead of existing and emerging rivals, TSMC needs to keep investing in R&D and expand its production capacities, so a $100 billion investment plan will be instrumental for these purposes.

EUV Pellicles Ready For Fabs, Expected to Boost Chip Yields and Sizes

Foundries started limited usage of extreme ultraviolet (EUV) lithography for high-volume manufacturing (HVM) of chips in 2019. At the time, ASML’s Twinscan NXE scanners were good enough for production, but the full EUV ecosystem was not quite there. One of the things that impacted EUV was the lack of protective pellicles for photomasks, which limited usage of EUV tools and affected yields. Fortunately, the situation with pellicles has finally improved thanks to the recent introduction of production-ready EUV pellicles, and matters promise to get even better in the coming years.

Protecting Precious Reticles

ASML has made a great progress with its Twinscan NXE EUV lithography tools in the recent years, improving performance of light source, availability time, and productivity. Its industry peers have also done a lot to make high-volume manufacturing (HVM) using EUV equipment possible. Still, the EUV ecosystem needs to develop further. One of the most notorious challenges the semiconductor supply chain faced with EUV is development of pellicles that were not available two years ago, which is why TSMC and Samsung Foundry had to invent ways how to use their EUV scanners without protective films.


For Reference: A 16nm TSMC Pellicle With Reticle

Pellicles protect 6×6-inch photomasks (reticles) during the chip production flow by sealing them away from particles that could land on their surface, which would otherwise damage them or introduce defects to wafers in production. Each reticle for an EUV tool costs $300,000, so chipmakers are eager to protect them against damage by particles or even the EUV radiation itself as this lowers their costs. Meanwhile, reducing risks associated with yields is perhaps even more important.

The need for pellicles, in turn, varies depending on the manufacturer and the types of photomasks employed. Intel, which is known for its big CPU dies, tends to use single-die reticles, which means that just one mask defect introduced by a particle automatically kills the whole die. Meanwhile, if a 25-die photomask is used, a particle adder will ‘only’ result in 4% lower yield (one dead die), which is why it’s been possible to get away without pellicles for smaller chips and multi-die photomasks.

ASML Leading the Pack. For Now

The industry started to develop protective films for EUV tools relatively late after it transpired that nobody can guarantee that an ultra-complex EUV scanner is 100% free of harmful particles, which is why they were not ready in 2019.

Pellicles for photomasks to be used with deep ultraviolet (DUV) lithography equipment are common and cheap. By contrast, since photomasks for EUV are different from photomasks for DUV (EUV masks are essentially 250 to 350-nm thick stacks featuring 40 to 50 alternating layers of silicon and molybdenum on a substrate), pellicles for such reticles are also quite different. In particular, the very short wavelength of EUV means that pellicles for it have a number of requirements that make them uneasy to produce and expensive. EUV pellicles have to be extremely thin, should not affect reflection characteristics of reticles, should feature a high transmission rate (the higher the rate, the higher is productivity of a scanner), should sustain high EUV power levels, and withstand extreme temperatures (from 600ºC to 1,000ºC in the future).


ASML’s EUV Pellicle (Image Credit: Semiconductor Engineering)

“Most materials absorb very strongly at the more energetic 13.5nm EUV wavelength and, even when the most EUV-transparent materials are selected, the membranes must be extremely thin to approach 90% transmittance,” said Emily Gallagher, a principal member of technical staff at Imec. “Such thin membranes are not usually capable of maintaining sufficient strength to be free-standing at the required dimensions. Additionally, the EUV scanner environment is not compatible with many materials and will subject the pellicle to pump-vent cycles.”

To date, a number of EUV pellicle options have emerged, according to SemiEngineering:

  • ASML introduced its first EUV pellicles in 2019 and licensed the technology to Mitsui Chemicals, which intends to start their volume sales in Q2 2021. Since then, ASML has improved its pellicles.
  • Imec has disclosed test results of its pellicles based on carbon nanotubes.
  • Graphene Square, Freudenberg Sealing Technologies (FST), and some universities are developing their own pellicles.

So far, only ASML has managed to create commercially viable pellicles for EUV tools that are actually available. ASML’s pellicles are based on polysilicon that is 50 nm thick. Back in 2016, they demonstrated a 78% transmissions rate on a simulated 175W source. Currently ASML can sell a pellicle with an 88% transmission rate. And shortly, Mitsui will start supplying such pellicles in volume.

ASML’s latest prototypes made of metal silicide demonstrate a 90.6% transmission rate with 0.2% non-uniformities and less than 0.005% reflectivity on a 400W source.

“This upgrade supports our roadmap, which eventually will take source power up to 400 Watts,” said Raymond Maas, ASML’s product manager for pellicles, in an interview with Bits&Chips.nl. “The pellicle heats up to 600ºC at that power level, which the polysilicon couldn’t withstand.”

By contrast, Imec’s prototype pellicles have a transmission rate of 97.7%. In fact, in the long term, when more advanced light sources are available, more sophisticated pellicles will be needed and this is where Imec’s carbon nanotubes-based pellicles will come into play.

“Few materials have the potential of high EUV transmission beyond 90% and even fewer materials are at the same time compatible with EUV powers beyond 600W. In addition, the pellicle needs to be strong to be suspended over a large area of the mask (~110mm x 140mm),” said Joost Bekaert, a researcher from Imec.

Unfortunately, it is unclear when Imec’s carbon nanotube-based pellicles will be ready for primetime.

Summary

TSMC and Samsung Foundry have invented ways to use EUV lithography tools without pellicles on multi-die photomasks for smaller chips, but such methods are risky as any particle adder can become a yield killing defect. Furthermore, such methods are risky for bigger chips and single-die photomasks, so pellicles are critical for enabling large dies to be made with EUV tools. That said, regardless of the photomask size, pellicles are needed to improve EUV yields and reduce risks across the board.

Overall then, the use of and improvements in EUV pellicles will be a gradual process. The initial pellicles developed and made by ASML and soon to be made by Mitsui are good enough for some of today’s needs, but there is room for improvement with their transmission levels, as evidenced by the next-generation prototypes developed by ASML and Imec. Better pellicles will be needed to account for future scanners as well, since those machines will have more powerful sources. Nonetheless, since such pellicles have a number of indisputable advantages, they are going to be used by chipmakers as they can help to improve yields even at the cost of some productivity.

Foundries started limited usage of extreme ultraviolet (EUV) lithography for high-volume manufacturing (HVM) of chips in 2019. At the time, ASML's Twinscan NXE scanners were good enough for production, but the full EUV ecosystem was not quite there. One of the things that impacted EUV was the lack of protective pellicles for photomasks, which limited usage of EUV tools and affected yields. Fortunately, the situation with pellicles has finally improved thanks to the recent introduction of production-ready EUV pellicles, and matters promise to get even better in the coming years.

Protecting Precious Reticles

ASML has made a great progress with its Twinscan NXE EUV lithography tools in the recent years, improving performance of light source, availability time, and productivity. Its industry peers have also done a lot to make high-volume manufacturing (HVM) using EUV equipment possible. Still, the EUV ecosystem needs to develop further. One of the most notorious challenges the semiconductor supply chain faced with EUV is development of pellicles that were not available two years ago, which is why TSMC and Samsung Foundry had to invent ways how to use their EUV scanners without protective films.


For Reference: A 16nm TSMC Pellicle With Reticle

Pellicles protect 6×6-inch photomasks (reticles) during the chip production flow by sealing them away from particles that could land on their surface, which would otherwise damage them or introduce defects to wafers in production. Each reticle for an EUV tool costs $300,000, so chipmakers are eager to protect them against damage by particles or even the EUV radiation itself as this lowers their costs. Meanwhile, reducing risks associated with yields is perhaps even more important.

The need for pellicles, in turn, varies depending on the manufacturer and the types of photomasks employed. Intel, which is known for its big CPU dies, tends to use single-die reticles, which means that just one mask defect introduced by a particle automatically kills the whole die. Meanwhile, if a 25-die photomask is used, a particle adder will 'only' result in 4% lower yield (one dead die), which is why it's been possible to get away without pellicles for smaller chips and multi-die photomasks.

ASML Leading the Pack. For Now

The industry started to develop protective films for EUV tools relatively late after it transpired that nobody can guarantee that an ultra-complex EUV scanner is 100% free of harmful particles, which is why they were not ready in 2019.

Pellicles for photomasks to be used with deep ultraviolet (DUV) lithography equipment are common and cheap. By contrast, since photomasks for EUV are different from photomasks for DUV (EUV masks are essentially 250 to 350-nm thick stacks featuring 40 to 50 alternating layers of silicon and molybdenum on a substrate), pellicles for such reticles are also quite different. In particular, the very short wavelength of EUV means that pellicles for it have a number of requirements that make them uneasy to produce and expensive. EUV pellicles have to be extremely thin, should not affect reflection characteristics of reticles, should feature a high transmission rate (the higher the rate, the higher is productivity of a scanner), should sustain high EUV power levels, and withstand extreme temperatures (from 600ºC to 1,000ºC in the future).


ASML's EUV Pellicle (Image Credit: Semiconductor Engineering)

"Most materials absorb very strongly at the more energetic 13.5nm EUV wavelength and, even when the most EUV-transparent materials are selected, the membranes must be extremely thin to approach 90% transmittance," said Emily Gallagher, a principal member of technical staff at Imec. "Such thin membranes are not usually capable of maintaining sufficient strength to be free-standing at the required dimensions. Additionally, the EUV scanner environment is not compatible with many materials and will subject the pellicle to pump-vent cycles."

To date, a number of EUV pellicle options have emerged, according to SemiEngineering:

  • ASML introduced its first EUV pellicles in 2019 and licensed the technology to Mitsui Chemicals, which intends to start their volume sales in Q2 2021. Since then, ASML has improved its pellicles.
  • Imec has disclosed test results of its pellicles based on carbon nanotubes.
  • Graphene Square, Freudenberg Sealing Technologies (FST), and some universities are developing their own pellicles.

So far, only ASML has managed to create commercially viable pellicles for EUV tools that are actually available. ASML's pellicles are based on polysilicon that is 50 nm thick. Back in 2016, they demonstrated a 78% transmissions rate on a simulated 175W source. Currently ASML can sell a pellicle with an 88% transmission rate. And shortly, Mitsui will start supplying such pellicles in volume.

ASML's latest prototypes made of metal silicide demonstrate a 90.6% transmission rate with 0.2% non-uniformities and less than 0.005% reflectivity on a 400W source.

"This upgrade supports our roadmap, which eventually will take source power up to 400 Watts," said Raymond Maas, ASML’s product manager for pellicles, in an interview with Bits&Chips.nl. "The pellicle heats up to 600ºC at that power level, which the polysilicon couldn’t withstand."

By contrast, Imec's prototype pellicles have a transmission rate of 97.7%. In fact, in the long term, when more advanced light sources are available, more sophisticated pellicles will be needed and this is where Imec's carbon nanotubes-based pellicles will come into play.

"Few materials have the potential of high EUV transmission beyond 90% and even fewer materials are at the same time compatible with EUV powers beyond 600W. In addition, the pellicle needs to be strong to be suspended over a large area of the mask (~110mm x 140mm)," said Joost Bekaert, a researcher from Imec.

Unfortunately, it is unclear when Imec's carbon nanotube-based pellicles will be ready for primetime.

Summary

TSMC and Samsung Foundry have invented ways to use EUV lithography tools without pellicles on multi-die photomasks for smaller chips, but such methods are risky as any particle adder can become a yield killing defect. Furthermore, such methods are risky for bigger chips and single-die photomasks, so pellicles are critical for enabling large dies to be made with EUV tools. That said, regardless of the photomask size, pellicles are needed to improve EUV yields and reduce risks across the board.

Overall then, the use of and improvements in EUV pellicles will be a gradual process. The initial pellicles developed and made by ASML and soon to be made by Mitsui are good enough for some of today's needs, but there is room for improvement with their transmission levels, as evidenced by the next-generation prototypes developed by ASML and Imec. Better pellicles will be needed to account for future scanners as well, since those machines will have more powerful sources. Nonetheless, since such pellicles have a number of indisputable advantages, they are going to be used by chipmakers as they can help to improve yields even at the cost of some productivity.

SMIC to Build a New 28nm Fab in Shenzhen: Production to Start in 2022

As further evidence that the ongoing chip crunch is hitting every level of the chip manufacturing chain, Chinese chipmaker SMIC has announced plans to build a new 28nm manufacturing plant in Shenzhen, with expected start of production in 2022.

As further evidence that the ongoing chip crunch is hitting every level of the chip manufacturing chain, Chinese chipmaker SMIC has announced plans to build a new 28nm manufacturing plant in Shenzhen, with expected start of production in 2022.

AI Meets Chipmaking: Applied Materials Incorporates AI In Wafer Inspection Process

Advanced system-on-chip designs are extremely complex in terms of transistor count and are hard to build using the latest fabrication processes. In a bid to make production of next-generation chips economically feasible, chip fabs need to ensure high yields early in their lifecycle by quickly finding and correcting defects.

But finding and fixing defects is not easy today, as traditional optical inspection tools don’t offer sufficiently detailed image resolution, while high-resolution e-beam and multibeam inspection tools are relatively slow. Looking to bridge the gap on inspection costs and time, Applied Materials has been developing a technology called ExtractAI technology, which uses a combination of the company’s latest Enlight optical inspection tool, SEMVision G7 e-beam review system, and deep learning (AI) to qucikly find flaws. And surprisingly, this solution has been in use for about a year now.

Advanced system-on-chip designs are extremely complex in terms of transistor count and are hard to build using the latest fabrication processes. In a bid to make production of next-generation chips economically feasible, chip fabs need to ensure high yields early in their lifecycle by quickly finding and correcting defects.

But finding and fixing defects is not easy today, as traditional optical inspection tools don't offer sufficiently detailed image resolution, while high-resolution e-beam and multibeam inspection tools are relatively slow. Looking to bridge the gap on inspection costs and time, Applied Materials has been developing a technology called ExtractAI technology, which uses a combination of the company's latest Enlight optical inspection tool, SEMVision G7 e-beam review system, and deep learning (AI) to qucikly find flaws. And surprisingly, this solution has been in use for about a year now.

Seagate’s Roadmap: The Path to 120 TB Hard Drives

Seagate recently published its long-term technology roadmap revealing plans to produce ~50 TB hard drives by 2026 and 120+ TB HDDs after 2030. In the coming years, Seagate is set to leverage usage of heat-assisted magnetic recording (HAMR), adopt bit patterned media (BPM) in the long term, and to expand usage of multi-actuator technology (MAT) for high-capacity drives. This is all within the 3.5-inch form factor.

“We can use our recent experience, productizing our 20 TB HAMR drive to translate from laboratory demonstrations to products, which puts us on track to deliver 50 terabytes by 2026,” said John Morris, Chief Technology Officer of Seagate. “We have drive technologies planned which will enable long term HAMR growth and a path to over 100 TB devices. And hard disk drives will continue to service the needs of mass capacity storage with the most optimal, total cost of ownership for the next decade and beyond.”

HAMR to Enable 90 TB HDDs

In the recent years HDD capacity has been increasing rather slowly as perpendicular magnetic recording (PMR),  even boosted with two-dimensional magnetic recording (TDMR), is reaching its limits. Seagate’s current top-of-the-range HDD features a 20 TB capacity and is based on HAMR, which not only promises to enable 3.5-inch hard drives with a ~90 TB capacity in the long term, but also to allow Seagate to increase capacities of its products faster.

In particular, Seagate expects 30+ TB HDDs to arrive in calendar 2023, then 40+ TB drives in 2024 ~ 2025, and then 50+ TB HDDs sometimes in 2026. This was revealed at its recent Virtual Analyst Event. In 2030, the manufacturer intends to release a 100 TB HDD, with 120 TB units following on later next decade. To hit these higher capacities, Seagate is looking to adopt new types of media.

“As we approach the maximum useful capacity of PMR technology, each successive drive increases by 1TB or 2TB at a time,” said Jeff Fochtman, Seagate’s SVP of Business and Marketing at the company’s Analyst Meeting. “With HAMR technology, it allows us to jump in steps of 4 terabytes, 6 terabytes, or even 10 terabytes at a time.”

Today’s 20 TB HAMR HDD uses nine 2.22-TB platters featuring an areal density of around 1.3 Tb/inch2. To build a nine-platter 40 TB hard drive, the company needs HAMR media featuring an areal density of approximately 2.6 Tb Tb/inch2. Back in 2018~2019 the company already achieved a 2.381 Tb/inch2 areal density in spinstand testing in its lab and recently it actually managed to hit 2.6 Tb/inch2 in the lab, so the company knows how to build media for 40 TB HDDs. However to build a complete product, it will still need to develop the suitable head, drive controller, and other electronics for its 40 TB drive, which will take several years.

Bit Patterned Media (BPM) to enable HDDs up to 120 TB

In general, Seagate projects HAMR technology to continue scaling for years to come without cardinal changes. The company expects HAMR and nanogranular media based on glass substrates and featuring iron platinum alloy (FePt) magnetic films to scale to 4 ~ 6 Tb/inch2 in areal density. This should enable hard drives of up to 90 TB in capacity.

In a bid to hit something like 105 TB, Seagate expects to use ordered-granular media with 5 ~ 7 Tb/inch2 areal density. To go further, the world’s largest HDD manufacturer plans to use ‘fully’ bit patterned media (BPM) with an 8 Tb/inch2 areal density or higher. All new types of media will still require some sort of assisted magnetic recording, so HAMR will stay with us in one form or another for years to come.

“We see an opportunity to scale this design space with granular media into the range of 4 Tb/inch2 to 6 Tb/inch2, at which point we plan to add patterning in one dimension through the use of ordered grain media,” said Morris. “This, we expect to be a steppingstone in media to open up the range of 5 Tb/inch2 to 7 Tb/inch2. Then we will transition to fully patterned media to open up densities to 8 Tb/inch2 and even higher. With the areal density CAGR just introduced, we have a path to 10TB per disk by 2030. This then represents our outlook for technology limits over the next 10 to 15 years.”

Performance Improvements Included

Increasing the capacity of hard drives is extremely important to keep them competitive with solid-state drives, but in a bid to stay relevant for operators of cloud datacenters, HDDs also need to improve sequential and random performance.

Sequential performance of hard drives surges along with areal density, so we see gradual HDD performance bumps every year. But as the capacity of a drive increase, the random IOPS-per-TB performance drops, which requires operators of large datacenters to mitigate this with caches to maintain their Quality-of-Service, which means additional costs.

Seagate and Western Digital have been looking to radically increase sequential and random performance of HDDs by installing more than one actuator, with multiple read/write heads into one drive. Seagate’s Mach.2 technology — which embraces two actuators — can almost double IOPS-per-TB performance of a hard drive and substantially increase its sequential read/write speeds. Furthermore, with two independent actuators, Seagate can almost halve the time it needs to test one drive before shipping, which reduces its manufacturing costs. The advantage of two actuators will become even more significant as HDD makers transit to platforms with more platters.

“A notable benefit to dual actuator technology standardization is that it drastically cuts down test time, and therefore, hard drive production time is greatly reduced,” said Fochtman. “This is a benefit we’re looking forward to recognizing on the cost side of the business.”

There are about a dozen of customers that already use Seagate’s Mach.2 PMR-based HDDs in their datacenters, although these drives do not have a commercial branding. Eventually, the company plans to make Mach.2 HDDs available to other clients, yet the company does not disclose when this is set to happen. However, the manufacturer is poised to use its Mach.2 technology more broadly once its drives hit capacities of above 30 TB, as drives with one actuator will not have sufficient performance, and a one-actuator design would increase the total cost of ownership.

“Although Mach.2 is ramped and being used now, it is also really still in a technology-staging mode,” said Fochtman. “When we reach capacity points above 30 terabytes, it will become a standard feature in many large data center environments.”

HDD TCO to Remain Low

Speaking of TCO, Seagate is confident that hard drives will remain cost-effective storage devices for many years to come. Seagate believes that 3D NAND will not beat HDDs in terms of per-GB cost any time soon and TCO of hard drives will remain at competitive levels. Right now, 90% of data stored by cloud datacenters is stored on HDDs and Seagate expects this to continue.

“We believe that the TCO for hard disk drives and SSDs will stay approximately in equilibrium,” said Morris. “Both SSDs and hard disk drives will continue to improve their value proposition, and storage demand for both will continue to grow. They are both critical enabling technologies for the growing datasphere, and their synergistic relationship in the data center infrastructure will persist.”

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Seagate recently published its long-term technology roadmap revealing plans to produce ~50 TB hard drives by 2026 and 120+ TB HDDs after 2030. In the coming years, Seagate is set to leverage usage of heat-assisted magnetic recording (HAMR), adopt bit patterned media (BPM) in the long term, and to expand usage of multi-actuator technology (MAT) for high-capacity drives. This is all within the 3.5-inch form factor.

"We can use our recent experience, productizing our 20 TB HAMR drive to translate from laboratory demonstrations to products, which puts us on track to deliver 50 terabytes by 2026," said John Morris, Chief Technology Officer of Seagate. "We have drive technologies planned which will enable long term HAMR growth and a path to over 100 TB devices. And hard disk drives will continue to service the needs of mass capacity storage with the most optimal, total cost of ownership for the next decade and beyond."

HAMR to Enable 90 TB HDDs

In the recent years HDD capacity has been increasing rather slowly as perpendicular magnetic recording (PMR),  even boosted with two-dimensional magnetic recording (TDMR), is reaching its limits. Seagate's current top-of-the-range HDD features a 20 TB capacity and is based on HAMR, which not only promises to enable 3.5-inch hard drives with a ~90 TB capacity in the long term, but also to allow Seagate to increase capacities of its products faster.

In particular, Seagate expects 30+ TB HDDs to arrive in calendar 2023, then 40+ TB drives in 2024 ~ 2025, and then 50+ TB HDDs sometimes in 2026. This was revealed at its recent Virtual Analyst Event. In 2030, the manufacturer intends to release a 100 TB HDD, with 120 TB units following on later next decade. To hit these higher capacities, Seagate is looking to adopt new types of media.

"As we approach the maximum useful capacity of PMR technology, each successive drive increases by 1TB or 2TB at a time," said Jeff Fochtman, Seagate's SVP of Business and Marketing at the company's Analyst Meeting. "With HAMR technology, it allows us to jump in steps of 4 terabytes, 6 terabytes, or even 10 terabytes at a time."

Today's 20 TB HAMR HDD uses nine 2.22-TB platters featuring an areal density of around 1.3 Tb/inch2. To build a nine-platter 40 TB hard drive, the company needs HAMR media featuring an areal density of approximately 2.6 Tb Tb/inch2. Back in 2018~2019 the company already achieved a 2.381 Tb/inch2 areal density in spinstand testing in its lab and recently it actually managed to hit 2.6 Tb/inch2 in the lab, so the company knows how to build media for 40 TB HDDs. However to build a complete product, it will still need to develop the suitable head, drive controller, and other electronics for its 40 TB drive, which will take several years.

Bit Patterned Media (BPM) to enable HDDs up to 120 TB

In general, Seagate projects HAMR technology to continue scaling for years to come without cardinal changes. The company expects HAMR and nanogranular media based on glass substrates and featuring iron platinum alloy (FePt) magnetic films to scale to 4 ~ 6 Tb/inch2 in areal density. This should enable hard drives of up to 90 TB in capacity.

In a bid to hit something like 105 TB, Seagate expects to use ordered-granular media with 5 ~ 7 Tb/inch2 areal density. To go further, the world's largest HDD manufacturer plans to use 'fully' bit patterned media (BPM) with an 8 Tb/inch2 areal density or higher. All new types of media will still require some sort of assisted magnetic recording, so HAMR will stay with us in one form or another for years to come.

"We see an opportunity to scale this design space with granular media into the range of 4 Tb/inch2 to 6 Tb/inch2, at which point we plan to add patterning in one dimension through the use of ordered grain media," said Morris. "This, we expect to be a steppingstone in media to open up the range of 5 Tb/inch2 to 7 Tb/inch2. Then we will transition to fully patterned media to open up densities to 8 Tb/inch2 and even higher. With the areal density CAGR just introduced, we have a path to 10TB per disk by 2030. This then represents our outlook for technology limits over the next 10 to 15 years."

Performance Improvements Included

Increasing the capacity of hard drives is extremely important to keep them competitive with solid-state drives, but in a bid to stay relevant for operators of cloud datacenters, HDDs also need to improve sequential and random performance.

Sequential performance of hard drives surges along with areal density, so we see gradual HDD performance bumps every year. But as the capacity of a drive increase, the random IOPS-per-TB performance drops, which requires operators of large datacenters to mitigate this with caches to maintain their Quality-of-Service, which means additional costs.

Seagate and Western Digital have been looking to radically increase sequential and random performance of HDDs by installing more than one actuator, with multiple read/write heads into one drive. Seagate's Mach.2 technology — which embraces two actuators — can almost double IOPS-per-TB performance of a hard drive and substantially increase its sequential read/write speeds. Furthermore, with two independent actuators, Seagate can almost halve the time it needs to test one drive before shipping, which reduces its manufacturing costs. The advantage of two actuators will become even more significant as HDD makers transit to platforms with more platters.

"A notable benefit to dual actuator technology standardization is that it drastically cuts down test time, and therefore, hard drive production time is greatly reduced," said Fochtman. "This is a benefit we're looking forward to recognizing on the cost side of the business."

There are about a dozen of customers that already use Seagate's Mach.2 PMR-based HDDs in their datacenters, although these drives do not have a commercial branding. Eventually, the company plans to make Mach.2 HDDs available to other clients, yet the company does not disclose when this is set to happen. However, the manufacturer is poised to use its Mach.2 technology more broadly once its drives hit capacities of above 30 TB, as drives with one actuator will not have sufficient performance, and a one-actuator design would increase the total cost of ownership.

"Although Mach.2 is ramped and being used now, it is also really still in a technology-staging mode," said Fochtman. "When we reach capacity points above 30 terabytes, it will become a standard feature in many large data center environments."

HDD TCO to Remain Low

Speaking of TCO, Seagate is confident that hard drives will remain cost-effective storage devices for many years to come. Seagate believes that 3D NAND will not beat HDDs in terms of per-GB cost any time soon and TCO of hard drives will remain at competitive levels. Right now, 90% of data stored by cloud datacenters is stored on HDDs and Seagate expects this to continue.

"We believe that the TCO for hard disk drives and SSDs will stay approximately in equilibrium," said Morris. "Both SSDs and hard disk drives will continue to improve their value proposition, and storage demand for both will continue to grow. They are both critical enabling technologies for the growing datasphere, and their synergistic relationship in the data center infrastructure will persist."

Related Reading

GlobalFoundries to Invest $1.4B in Expansion, Potential Earlier IPO

GlobalFoundries this week reiterated plans to invest $1.4 billion this year in expansion of its manufacturing capacities across the world. Around one third of the sum will be co-invested by GlobalFoundries’ customers who want to ensure that they have capacity allocation for years to come. The world’s fourth largest foundry is also mulling to bring forward its IPO to late 2021 ahead of its original 2022 date.

In any typical year, GlobalFoundries spends about $700 million on expansion of its production capacities, however growing demand for chips has made clear the need for faster than normal groth – as a result the company is to invest $1.4 billion on expansion this year. The money will be divided equally between GlobalFoundries’ sites in Dresden, Malta (New York) and Singapore, according to Reuters. Production capacity is expected to increase by 13% this year and by 20% next year as a result of the increased funding.

Last year GlobalFoundries said that it planned to significantly increase capacity it its Fab 1 located near Dresden. The company’s German facility produces chips using 22FDX, 28SLP, 40/45/55NV as well as BCDLite technologies that are particularly important for automotive, mobile, IoT, and industrial applications. Capacity of Fab 1 in 2021 is expected to be in the range between 400,000 and 500,000 wafer starts per year. Increasing that number means that GlobalFoundries will be able to better address high-growth applications.

GlobalFoundries expects to raise around a third of $1.4 billion from its customers that will pre-pay to guarantee supply over the following years, the CEO of the company told Reuters. He did not name the clients.

In addition to boosting its existing production facilities, GlobalFoundries is also looking forward building another fab adjacent to its Fab 8 located in Malta, New York. Funding of the new facility will largely depend on subsidies and incentives provided by the U.S. Government and the state of New York as parts of the CHIPS for America act introduced last year. It should also be noted that Fab 8 in Malta recently recieved ITAR certification for DoD production on its 45 nm process, expanding GlobalFoundries’ value as a home-grown chip manufacturer to the US government.

Back in 2020 GlobalFoundries earned approximately $5.7 billion in revenue, down from $6.176 billion in 2017. The company projects that in 2021 its revenue will grow by 9% to 10% year-over-year as a result of unprecedented demand. 

Since demand for chips is growing and governments have investments almost ready to go, it would seems to be a good time for GlobalFoundries’ initial public offering. Previously GlobalFoundries planned to go public in late 2022 or early 2023, but the company appears to be thinking about bringing it forward into the late 2021 timeframe. Currently GlobalFoundries is wholly owned by Mubadala, an Emerati state-owned holding company.

Related Reading

GlobalFoundries this week reiterated plans to invest $1.4 billion this year in expansion of its manufacturing capacities across the world. Around one third of the sum will be co-invested by GlobalFoundries' customers who want to ensure that they have capacity allocation for years to come. The world's fourth largest foundry is also mulling to bring forward its IPO to late 2021 ahead of its original 2022 date.

In any typical year, GlobalFoundries spends about $700 million on expansion of its production capacities, however growing demand for chips has made clear the need for faster than normal groth - as a result the company is to invest $1.4 billion on expansion this year. The money will be divided equally between GlobalFoundries' sites in Dresden, Malta (New York) and Singapore, according to Reuters. Production capacity is expected to increase by 13% this year and by 20% next year as a result of the increased funding.

Last year GlobalFoundries said that it planned to significantly increase capacity it its Fab 1 located near Dresden. The company's German facility produces chips using 22FDX, 28SLP, 40/45/55NV as well as BCDLite technologies that are particularly important for automotive, mobile, IoT, and industrial applications. Capacity of Fab 1 in 2021 is expected to be in the range between 400,000 and 500,000 wafer starts per year. Increasing that number means that GlobalFoundries will be able to better address high-growth applications.

GlobalFoundries expects to raise around a third of $1.4 billion from its customers that will pre-pay to guarantee supply over the following years, the CEO of the company told Reuters. He did not name the clients.

In addition to boosting its existing production facilities, GlobalFoundries is also looking forward building another fab adjacent to its Fab 8 located in Malta, New York. Funding of the new facility will largely depend on subsidies and incentives provided by the U.S. Government and the state of New York as parts of the CHIPS for America act introduced last year. It should also be noted that Fab 8 in Malta recently recieved ITAR certification for DoD production on its 45 nm process, expanding GlobalFoundries' value as a home-grown chip manufacturer to the US government.

Back in 2020 GlobalFoundries earned approximately $5.7 billion in revenue, down from $6.176 billion in 2017. The company projects that in 2021 its revenue will grow by 9% to 10% year-over-year as a result of unprecedented demand. 

Since demand for chips is growing and governments have investments almost ready to go, it would seems to be a good time for GlobalFoundries' initial public offering. Previously GlobalFoundries planned to go public in late 2022 or early 2023, but the company appears to be thinking about bringing it forward into the late 2021 timeframe. Currently GlobalFoundries is wholly owned by Mubadala, an Emerati state-owned holding company.

Related Reading

Report: Semi Demand 30% Above Supply, 20% Year-on-Year Growth

Semiconductor foundry offerings are thriving due to unprecedented demand for semiconductors and processors in recent quarters. Analysts from TrendForce believe that in Q1 2021 foundries will increase their revenue by 20% year-over-year as their capaci…

Semiconductor foundry offerings are thriving due to unprecedented demand for semiconductors and processors in recent quarters. Analysts from TrendForce believe that in Q1 2021 foundries will increase their revenue by 20% year-over-year as their capacities are fully loaded. Since the demand for chips is projected to continue to exceed the constrained supply for several quarters, market observers predict that manufacturers will be busy for a long time, and beyond this, will take a long time to catch up. This is good news for foundry revenue, and may encourage others to widen their foundry offerings. Warnings however about fab equipment are coming into play - being fully loaded means equipment now wears out faster, which increases risks of disruptions should that equipment also be short on supply.

Toshiba Unveils World’s First FC-MAMR HDD: 18 TB, Helium Filled

Toshiba this week announced the industry’s first hard drive featuring flux-control microwave-assisted magnetic recording (FC-MAMR) technology. The new MG09-series HDDs are designed primarily for nearline and enterprise applications, they offer an 18 TB capacity along with an ultra-low idle power consumption. 

The Toshiba MG09-series 3.5-inch 18 TB HDD are based on the company’s 3rd generation nine-platter helium sealed platform that features 18 heads with a microwave-emitting component which changes magnetic coercivity of the platters before writing data. The HD disks are made by Showa Denko K.K. (SDK), a long-time partner of Toshiba. Each aluminum platter is about 0.635 mm thick, it features an areal density of around 1.5 Tb/inch2 and can store up to 2 TB of data. The MG09 family also includes a 16 TB model which presumably features a lower number of platters (based on the same performance rating).

For modern enterprise and nearline 3.5-inch HDDs, Toshiba’s MG09-series drives uses a motor with a 7200-RPM spindle speed. The HDDs are also equipped with a 512 MB buffer and are rated for a 281 MB/s maximum sustained data transfer rate. Unfortunately, Toshiba has not updated the random access performance of the new products, though it is likely that their per-TB IOPS performance is lower when compared to predecessors. The manufacturer will offer its new drives both with SATA 3.3 (6 Gbps) and SAS 3.0 (12 Gbps) interfaces as well as a selection of logical data block length.

One of the noteworthy things about Toshiba’s MG09-series FC-MAMR HDDs is their power consumption. In active idle mode, they typically consume 4.16/4.54 Watts (SATA/SAS models), which is considerably lower when compared with Seagate’s Exos X18 as well as Western Digital’s Ultrastar DC HC550. As far as power consumption efficiency at idle (large hard drives could spend plenty of time idling) is concerned, the 18 TB MG09 is an undeniable champion consuming just 0.23 Watts per TB (in case of the SATA version). Meanwhile, the new drives are rated for 8.35/8.74 Watts (SATA/SAS SKUs) during read/write operations, which is higher when compared to the DC HC550 as well as predecessors from the MG07 and the MG08-series.

Brief Specifications of Toshiba’s MG09 HDDs
Capacity 18 TB 16 TB
Platters 9 8
Heads 18 16
Recording Technology Flux-control microwave-assisted
magnetic recording (FC-MAMR)
RPM 7200 RPM
Interface SATA 6 Gbps/SAS 12 Gbps
DRAM Cache 512 MB
Persistent Write Cache Yes
Helium-Filling Yes
Sequential Data Transfer Rate (host to/from drive) 281 MB/s
MTBF 2.5 million
Rated Annual Workload 550 TB
Acoustics (idle) 20 dB
Power Consumption Random read/write SATA: 8.35 W
SAS: 8.74 W
Idle SATA: 4.16 W
SAS: 4.54 W
Warranty 5 Years

As the MG09 family of hard drives are intended for datacenter racks that accommodate hundreds of vibrating HDDs, they feature numerous enhancements to ensure consistent performance, reliability, and durability. Typically such enhancements include top and bottom attached motors, RVFF, as well as environmental sensors. Like all modern drives for 24/7 applications, Toshiba’s MG09-series units are rated for a 550 TB average annualized workload, 2.5 million hours MTBF, and are covered with a standard five-year warranty.

Also, the new MG09 hard drives support Toshiba’s persistent write cache (PWC) with power loss protection (PLP) technology, which is crucial for 4K sector drives that emulate 512B sectors. The PWC with PLP feature guards data in case of power loss while performing read-modify-write (RMW) operation to align the source write request with the physical sectors it has to modify. This capability allows the company to address its clients who run legacy systems that still require high capacities. Also, the new MG09 family includes Sanitize Instant Erase (SIE) and Self Encrypting Drive (SED) models.

Toshiba has been working on its MG09-series FC-MAMR HDDs for at least two years already. Last year the company said it had made ‘significant investments in manufacturing facilities’ and promised to start shipments of its 18 TB hard drives by March 31, 2021. This week the company reaffirmed its plan and said it would begin sample shipments of its 18 TB MG09-series MAMR HDDs ‘at the end of March 2021.’

Source: Toshiba

Toshiba this week announced the industry's first hard drive featuring flux-control microwave-assisted magnetic recording (FC-MAMR) technology. The new MG09-series HDDs are designed primarily for nearline and enterprise applications, they offer an 18 TB capacity along with an ultra-low idle power consumption. 

The Toshiba MG09-series 3.5-inch 18 TB HDD are based on the company's 3rd generation nine-platter helium sealed platform that features 18 heads with a microwave-emitting component which changes magnetic coercivity of the platters before writing data. The HD disks are made by Showa Denko K.K. (SDK), a long-time partner of Toshiba. Each aluminum platter is about 0.635 mm thick, it features an areal density of around 1.5 Tb/inch2 and can store up to 2 TB of data. The MG09 family also includes a 16 TB model which presumably features a lower number of platters (based on the same performance rating).

For modern enterprise and nearline 3.5-inch HDDs, Toshiba's MG09-series drives uses a motor with a 7200-RPM spindle speed. The HDDs are also equipped with a 512 MB buffer and are rated for a 281 MB/s maximum sustained data transfer rate. Unfortunately, Toshiba has not updated the random access performance of the new products, though it is likely that their per-TB IOPS performance is lower when compared to predecessors. The manufacturer will offer its new drives both with SATA 3.3 (6 Gbps) and SAS 3.0 (12 Gbps) interfaces as well as a selection of logical data block length.

One of the noteworthy things about Toshiba's MG09-series FC-MAMR HDDs is their power consumption. In active idle mode, they typically consume 4.16/4.54 Watts (SATA/SAS models), which is considerably lower when compared with Seagate's Exos X18 as well as Western Digital's Ultrastar DC HC550. As far as power consumption efficiency at idle (large hard drives could spend plenty of time idling) is concerned, the 18 TB MG09 is an undeniable champion consuming just 0.23 Watts per TB (in case of the SATA version). Meanwhile, the new drives are rated for 8.35/8.74 Watts (SATA/SAS SKUs) during read/write operations, which is higher when compared to the DC HC550 as well as predecessors from the MG07 and the MG08-series.

Brief Specifications of Toshiba's MG09 HDDs
Capacity 18 TB 16 TB
Platters 9 8
Heads 18 16
Recording Technology Flux-control microwave-assisted
magnetic recording (FC-MAMR)
RPM 7200 RPM
Interface SATA 6 Gbps/SAS 12 Gbps
DRAM Cache 512 MB
Persistent Write Cache Yes
Helium-Filling Yes
Sequential Data Transfer Rate (host to/from drive) 281 MB/s
MTBF 2.5 million
Rated Annual Workload 550 TB
Acoustics (idle) 20 dB
Power Consumption Random read/write SATA: 8.35 W
SAS: 8.74 W
Idle SATA: 4.16 W
SAS: 4.54 W
Warranty 5 Years

As the MG09 family of hard drives are intended for datacenter racks that accommodate hundreds of vibrating HDDs, they feature numerous enhancements to ensure consistent performance, reliability, and durability. Typically such enhancements include top and bottom attached motors, RVFF, as well as environmental sensors. Like all modern drives for 24/7 applications, Toshiba's MG09-series units are rated for a 550 TB average annualized workload, 2.5 million hours MTBF, and are covered with a standard five-year warranty.

Also, the new MG09 hard drives support Toshiba’s persistent write cache (PWC) with power loss protection (PLP) technology, which is crucial for 4K sector drives that emulate 512B sectors. The PWC with PLP feature guards data in case of power loss while performing read-modify-write (RMW) operation to align the source write request with the physical sectors it has to modify. This capability allows the company to address its clients who run legacy systems that still require high capacities. Also, the new MG09 family includes Sanitize Instant Erase (SIE) and Self Encrypting Drive (SED) models.

Toshiba has been working on its MG09-series FC-MAMR HDDs for at least two years already. Last year the company said it had made 'significant investments in manufacturing facilities' and promised to start shipments of its 18 TB hard drives by March 31, 2021. This week the company reaffirmed its plan and said it would begin sample shipments of its 18 TB MG09-series MAMR HDDs 'at the end of March 2021.'

Source: Toshiba

Samsung Foundry: New $17 Billion Fab in the USA by Late 2023

Samsung Foundry has filed documents with authorities in Arizona, New York, and Texas seeking to build a leading-edge semiconductor manufacturing facility in the USA. The potential fab near Austin, Texas, is expected to cost over $17 billion and to create 1,800 jobs. If everything goes as planned, it will go online by the fourth quarter of 2023. There is an intrigue about the new fab though: Samsung hasn’t stated which process node it will be designed for. 

Samsung Foundry has filed documents with authorities in Arizona, New York, and Texas seeking to build a leading-edge semiconductor manufacturing facility in the USA. The potential fab near Austin, Texas, is expected to cost over $17 billion and to create 1,800 jobs. If everything goes as planned, it will go online by the fourth quarter of 2023. There is an intrigue about the new fab though: Samsung hasn't stated which process node it will be designed for.