Intel’s New eASIC N5X Series: Hardened Security for 5G and AI Through Structured ASICs

The programmability of a processor is a scale is all about flexibility and performance – something highly programmable and customizable is adaptable to all sort of situations, but often isn’t as fast. However, something that has a very spe…

The programmability of a processor is a scale is all about flexibility and performance – something highly programmable and customizable is adaptable to all sort of situations, but often isn’t as fast. However, something that has a very specified compute pathway can go very fast, but can’t do much beyond that pathway. On the flexible side, we have FPGAs, that can be configured to do almost anything. On the fixed side, we have ASICs, such as fixed function hardware for AI. Somewhere in the middle is what’s called a ‘Structured ASIC’, which tries to combine as many benefits from the two.

Intel’s New eASIC N5X Series: Hardened Security for 5G and AI Through Structured ASICs

The programmability of a processor is a scale is all about flexibility and performance – something highly programmable and customizable is adaptable to all sort of situations, but often isn’t as fast. However, something that has a very spe…

The programmability of a processor is a scale is all about flexibility and performance – something highly programmable and customizable is adaptable to all sort of situations, but often isn’t as fast. However, something that has a very specified compute pathway can go very fast, but can’t do much beyond that pathway. On the flexible side, we have FPGAs, that can be configured to do almost anything. On the fixed side, we have ASICs, such as fixed function hardware for AI. Somewhere in the middle is what’s called a ‘Structured ASIC’, which tries to combine as many benefits from the two.

MediaTek Subsidiary to Acquire Intel Enpirion Business for $85 Million

Today an agreement between MediaTek subsidiary Richtek and Intel has been made for Richtek to acquire Intel’s power management solutions and controller product line known as Enpirion. The agreement will enable the sale of the division, subject t…

Today an agreement between MediaTek subsidiary Richtek and Intel has been made for Richtek to acquire Intel’s power management solutions and controller product line known as Enpirion. The agreement will enable the sale of the division, subject to regulatory approval, for $85 million, and is expected to close in Q4.

Intel’s Enpirion business has been part of the company under the Programmable Solutions Group, formerly known as Altera, which was acquired by Intel in December 2015 for $16.7 billion. Altera had previously acquired Enpirion in May 2013 for $140 million, indicating a net loss over the seven years.

The Enpirion PowerSoC product line has been a series of system-on-a-chip DC-to-DC power converters, enabling higher power density and lower electrical noise compared to discrete power converter equivalents. The SoC nature also allows for on-the-fly adjustment at the time of delivery. This enables power delivery of a wide array of key products such as FPGAs and ASICs. Enpirion’s product portfolio also includes voltage bus converters, DDR memory terminators, high frequency technology, and 70A power rails.

In various reports, MediaTek has supposedly pointed to Enpirion’s high-frequency and high-efficiency power solutions as a key part of the acquisition, citing MediaTek’s push into enterprise-level system applications. The current belief is that MediaTek is planning to develop its ASIC business in a more serious manner than previously, targeting AI acceleration for hyperscalers.

For Intel, the sale of the Enpirion business clearly isn’t for the money – it sheds a division from the Programmable Solutions Group, allowing them to focus better on growth markets, according to Intel’s official statements. Chances are that Intel has an Enpirion equivalent elsewhere in the company to fill the gap, or might be involved in a purchasing agreement for the ex-Altera products that might use Enpirion. I highly suspect that Intel wasn’t actively marketing the product line for new customers that much anyway, and doesn’t see the market for potential revenue growth.

An Intel spokesperson gave us the following quote for this story:

Intel and Richtek, a subsidiary of MediaTek’s discrete power business, have signed an agreement for Richtek to acquire Intel’s Enpirion FPGA power product line. This transaction will enable Intel’s Programmable Solutions Group to focus on its core FPGA business and increase investment in high-growth opportunities that help position Intel to win key transitions to support 5G, edge computing, artificial intelligence, and the cloud.

If we get a MediaTek statement, we will add it to the article.

It sounds as if the agreement is more for the IP than the people. Update from Intel: Intel has confirmed that the whole business (people + IP) are involved in the acquisition. It will be interesting to see what plans MediaTek has that involve the product line.

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Bittware 4x100G FPGA Card, Uses Intel 10nm Agilex and oneAPI

This week at the annual Supercomputing HPC show, we’re going to see a number of high-profile enterprise announcements across a wide array of industries that support server and high-performance computing environments. One such announcement is fro…

This week at the annual Supercomputing HPC show, we’re going to see a number of high-profile enterprise announcements across a wide array of industries that support server and high-performance computing environments. One such announcement is from BittWare, which is announcing its new IA-840F add-in card built upon Intel’s latest FPGA product line. The IA-840F add-in card is a PCIe 4.0 x16 enabled device for next-generation datacenter, networking, and edge compute workloads, supporting hardened dual QSPF-DD (4x100G) connectivity.

The goal of adding an FPGA with networking connectivity to any enterprise environment has a number of benefits, such as offloaded workloads, accelerated workloads, and a configurable FPGA environment. This enables customers to quickly adapt to their workload requirements by implementing a reconfigured FPGA through software. When networking is bundled into the mix, additional SmartNIC features could come into play, either adapting outgoing traffic based on rules, or processing incoming data without even touching the CPU in play. The push towards enhanced ML-accelerated and analytical network traffic flows also benefit from FPGA and reconfigurable acceleration.

At the heart of the IA-840F is one of Intel’s Agilex FPGAs. This is a rarety – we rarely hear about where Intel’s Agilex hardware is being used, over a year since the products were announced into the market. Agilex is expected to come in three flavors, Agilex-F, Agilex-I, and Agilex-M, with the capabilities and performance rising through those offerings, and Agilex-F was the first one off the line.

I was going to say that the IA-840F seems to be using Agilex-I, as Intel’s Patrick Dorsey provided a quote for Bittware and mentioned 112G trancievers, however that seems to be a general quote about the family of Agilex FPGAs, not this specific product.

“Intel Agilex FPGAs and cross platform tools including the oneAPI toolkit are leading the way to enable easier access to these newest FPGAs and their tremendous capabilities - including eASIC integration, HBM integration, BFLOAT16, optimized tensor compute blocks, Compute Express Link (CXL), and 112 Gbps transceiver data rates for high speed 1Ghz compute and 400Gbps+ connectivity solutions”, said Patrick Dorsey, VP Product, Programmable Solutions Group at Intel.  “The highly customizable and heterogenous Agilex platform and oneAPI tools enable products like the new IA-840F accelerator card from BittWare to drive innovation from the edge to the cloud.”

That last bit is also an intriguing element to the new Bittware product: support for the oneAPI unified programming environment. OneAPI is Intel’s grand vision for a singular software platform for use in CPU, GPU, FPGA, and AI hardware – while the upper layer is built on a SYCL variant of Data Parallel C++ (DPC++), the libraries underneath will be optimized for the hardware along with a hardware abstraction layer from the programmer. The goals are admirable, and so far we’ve heard about oneAPI used in the context of GPUs as it relates to Intel’s Xe graphics with our recent interview of Intel’s Lisa Pearce, but we’ve not heard much on the FPGA side. With Bittware making this announcement, it would appear that the FPGA angle is certainly well on its way as well. Alongside oneAPI support, the IA-840F comes with a HDL developer toolkit, such as PCIe drivers, application example designs, and a board management controller. Based on the image of the IA-840F, it looks like that the unit has three DDR memory slots, likely for different accelerators on the FPGA.

Customers interested in the IA-840F will have a choice of thermal cooling options (passive, active, liquid), and shipments are expected to begin in Q2 2021. Initial public offerings will be made through Dell or HPE servers from the BittWare TeraBox range.

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Intel’s New 224G PAM4 Transceivers

One battleground in the world of FPGAs is the transceiver – the ability to bring in (or push out) high speed signals onto an FPGA at low power. In a world where FPGAs offer the ultimate ability in re-programmable logic, having multiple transceiv…

One battleground in the world of FPGAs is the transceiver – the ability to bring in (or push out) high speed signals onto an FPGA at low power. In a world where FPGAs offer the ultimate ability in re-programmable logic, having multiple transceivers to bring in the bandwidth is a key part of design. This is why SmartNICs and dense server-to-server interconnect topologies all rely on FPGAs for initial deployment and adaptation, before perhaps moving to an ASIC. As a result, the key FPGA companies that play in this space often look at high-speed transceiver adoption and design as part of the product portfolio.

In recent memory, Xilinx and Altera (now Intel), have been going back and forth, talking about 26G transceivers, 28G transceivers, 56G/58G, and we were given a glimpse into the 116G transceivers that Intel will implement as an option for its M-Series 10nm Agilex FPGAs back at Arch Day 2018. The Ethernet based 116G ‘F-Tile’ is a separate chiplet module connected to the central Agilex FPGA through an Embedded Multi-Die Interconnect Bridge (EMIB), as it is built on a different process to the main FPGA.

As part of Intel’s Architecture Day 2020, the company announced that it is now working on a new higher speed module, rated at 224G. This module is set to support both 224G in a PAM4 mode (4-bits) and 112G in an NRZ mode (2-bits). This should enable future generations of the Ethernet protocol stack, and Intel says it will be ready in late 2021/2022 and will be backwards compatible with the Agilex hardened 100/200/400 GbE stack. Intel didn’t go into any detail about bit-error rates or power at this time, but did show a couple of fancy eye diagrams.

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Hot Chips 2020 Live Blog: Xilinx Versal ACAPs (9:00am PT)

Hot Chips has gone virtual this year! Lots of talks on lots of products, including Tiger Lake, Xe, POWER10, Xbox Series X, TPUv3, and a special Raja Koduri Keynote. Stay tuned at AnandTech for our live blogs as we commentate on each talk.

Hot Chips has gone virtual this year! Lots of talks on lots of products, including Tiger Lake, Xe, POWER10, Xbox Series X, TPUv3, and a special Raja Koduri Keynote. Stay tuned at AnandTech for our live blogs as we commentate on each talk.

Hot Chips 2020 Live Blog: Intel 10nm Agilex FPGAs (8:30am PT)

Hot Chips has gone virtual this year! Lots of talks on lots of products, including Tiger Lake, Xe, POWER10, Xbox Series X, TPUv3, and a special Raja Koduri Keynote. Stay tuned at AnandTech for our live blogs as we commentate on each talk.

Our first session of Day 2 is on FPGAs, starting with updated to Intel’s 10nm Agilex family. Given that Intel spoke about 224G PAM4 transceivers last week at Architecture Day, we expect more of those sorts of details, along with new packaging options.

Hot Chips has gone virtual this year! Lots of talks on lots of products, including Tiger Lake, Xe, POWER10, Xbox Series X, TPUv3, and a special Raja Koduri Keynote. Stay tuned at AnandTech for our live blogs as we commentate on each talk.

Our first session of Day 2 is on FPGAs, starting with updated to Intel's 10nm Agilex family. Given that Intel spoke about 224G PAM4 transceivers last week at Architecture Day, we expect more of those sorts of details, along with new packaging options.